VLSI Circuits and Systems for Directional-Edge-Based Intelligent Image Processing

The continuous progress in semiconductor VLSI technologies during the past several decades has provided the opportunity of realizing real-time intelligent image processing systems such as image recognition, object tracking, motion recognition, etc. However, the traditional approach of running image processing algorithms on general purpose processors is not practical for building efficient systems at rational costs with low power-consumption. Therefore, a number of VLSI chips having parallel processing architectures such as graphics processing units (GPUs) have been developed to enhance the performance. Although the processing time can be reduced greatly, such approaches are not still efficient enough due to the complex and expensive image processing algorithms which usually include a number of floating point operations. In order to resolve the problem of such a large gap between the algorithms and their VLSI implementation and to maximally utilize the power of semiconductor technologies, we try to develop algorithms which are compatible with the physical characteristics of VLSI circuits. The robust nature of the human brain in visual information processing has been attracting a lot of researchers to discover better ways of image processing. Physiology research has revealed that the directional edge information in images is utilized as the most important clue in visual object recognition. Being inspired by such a biological principle, a series of direction-edge-based VLSI-implementationadapted intelligent image processing algorithms as well as the corresponding VLSI circuits and systems have been proposed and developed in our laboratory. This work succeeds the research in such bio-inspired algorithms, circuits, and systems. In order to minimize the latency caused by the image data transfer between the image sensor and the processing circuits, the most serious bottleneck in such systems, digital-pixel-sensor-embedded (DPS-embedded) processors were proposed and designed. The performance of such processor has been verified by building a real-time image recognition system with a very low latency. In